When designing circuits the need often arises to generate an accurate current bias from the supply. A possible known way of doing this is illustrated by the basic circuit shown in FIG. 1 of the accompanying drawings. This comprises a drive transition T2 the voltage and current reference for which is generated by means of a resistor R1 and series-connected diode-configured bias transistor T1. At start-up base current is drawn via resistor R1 whilst the diode-transistor T1 is reverse biassed. As the supply voltage rises the diode-transistor T1 turns on claMping the drive transistor T2 to a fixed base voltage, the forward bias voltage of the diode. This sample bias circuit, unfortunately has a number of drawbacks, namely direct supply dependence, transistor gain dependence and poor tolerance on low supply voltage.
A known variant of this basic circuit is also shown in FIG. 2. Here the single resistor R1 is replaced by a pair of resistors R1, R2 which serve as a voltage/current divider. The junction of the two resistors R1 and R2 is connected to the base of the bias transistor T1, and the collector of the bias transistor T1 now connected to the base of the drive transistor T2. This arrangement is also described in United kingdom Patent Application No: GB No. 2007055. This circuit variant provides better supply voltage rejection and also a degree of transistor compensation. It will not however operate down to low supply voltages of the order 0.9 V or so, without substantial optimisation. The response of the optimised circuit, characteristic C1, is shown in the graphical representation of FIG. 4, where the circuit has been optimised by scaling resistor values and transistor emitter area ratio for use at low voltages. The peak of the output current occurs below 0.7 V and the output current falls to zero by 1 V or so. This clearly is not suitable for supply voltages which rise to high voltages from 0.9 V upwards, and tnhis presents a problem.
It is aalso known to cascade the modified circuit shown FIG. 2 with its inverse circuit, to provide higher order current linearisation, ie. for better current regulation. This is shown in FIG. 3, where the simple current source resistor R1 is replaced by a more complex current source consisting of the inverse circuit comprising a drive transistor T2', a bias transistor T1', both of polarity type the reverse of transistors T1 and T2, and a collector load comprising a pair of resistors R1' and R2' connected in series and tapped to provide feedback to the base of the bias transistor T1'. Details of this cascade structure are given in the Article entitled "Optimum Design of Two Cascaded Peaking Current Sources" by V. Gheorghiu et al., IEEE Journal of Solid-State Circuits, Vol SC-16 No. 4 August 1981 pages 415-417. Typical current-voltage characteristics C2, C3 are also shown in FIG. 4.